(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming a self-aligned trenched contact opening in the fabrication of integrated circuits.
(2) Description of the Prior Art
The self-aligned contact (SAC) technology has been widely adopted to reduce device area in the fabrication of Very Large Scale Integrated Circuits (VLSI). However, as the contact area has decreased to the sub half-micron region, the contact resistance has become too large to be acceptable even with the use of the conventional SAC process. Therefore, the shrinkage of the device area is limited.
Referring to FIG. 1, there is illustrated a top view of a partially completed integrated circuit with active area 1. Contact area 2 is shown between polysilicon areas 3. Second polysilicon layer 4 completes the contact with area 2. FIG. 2 illustrates the cross-sectional representation of view 2--2 of FIG. 1. The size of the contact area is W.times.L, where W is the width of the contact area shown in FIG. 1 and L is the length of the area shown in FIG. 2. The spacing between the polysilicon lines 3 can be determined by adding the length of the contact area L to twice the size of the spacer 5.
U.S. Pat. No. 4,879,254 to Tsuzuki et al describes a self-aligned trenched contact method employing a shallow trench. The contacts described in this patent have a size on the order of 8 microns. Tsuzuki's invention requires a very shallow trench in order to prevent contact with the underlying N- region. In order to reduce contact resistance, the contact area must be increased. This calls for a deeper trench.